Please correct me if I have this all wrong but, > First, be aware that the barrier is done only when SMP support *or* full > kernel level preemption is enabled.
isn't the barrier also for the compiler? IIRC, gcc reorder instructions in an attempt to optimize code. A memory-barrier will effectively stop the compiler for mixing code from before the barrier into the code afterwards. -- To unsubscribe from this list: send an email with "unsubscribe kernelnewbies" to [EMAIL PROTECTED] Please read the FAQ at http://kernelnewbies.org/FAQ
