Rene Herman wrote: > On 22-02-08 09:12, Peter Teoh wrote: > >> This timing of 8Mhz (or 8.33Mhz right?) > > It's generally implemented as something like 7.5 to 8.33 yes, with that 8.33 > being a specification figure. > >> is supposed to be 1/4 of the PCI bus speed of 33Mhz right? (read from >> altera website). > > No. It _can_ be divided down from the PCI clock but only if it'll do. It's > supposed to be at around 8 MHz, whetever the source. > Ok, I think I got what u meant. I was confused by this device:
http://www.altera.com/products/ip/iup/pci/m-eur-pci-to-isa.html I forgotten that ISA is a legacy feature, and this device is actually trying to provide compatible function to map the PCI signal to ISA function. >> And so how about 66Mhz PCI bus - so for 8 bus cycles it will be half >> of 1us, correct? > > No, although PCI-X system with an ISA bridge no doubt exist, any system > driving an ISA bus at 16 MHz would serve mostly as an ISA peripheral cooker. > > Rene. > Sorry, the above arises from my confusion of this altera's feature against the standard, which of course does not link ISA to PCI speed. Thanks. -- To unsubscribe from this list: send an email with "unsubscribe kernelnewbies" to [EMAIL PROTECTED] Please read the FAQ at http://kernelnewbies.org/FAQ
