I got it fixed. As I said earlier, the difference between compatibility and
64bit mode is L/D bits in CS descriptor. However, while making far jump in
64bit mode, the operand size _must_ be set to 64bit (which is, by default,
32bit unless explicitly specified). So I had to put a "operand size prefix"
in front of "retf" ("o64 retf" in NASM) and it worked fine.Thanks guys, /tejas On Wed, Jun 4, 2008 at 6:34 PM, tejas khatiwala <[EMAIL PROTECTED]> wrote: > Hello, > > I am writing small code that boots, jumps to 32bit protected mode > (no-paging enabled) --> 64bit mode (pml4 paging) --> perform some 64bit test > --> jump back to 32bit protected mode (no-paging enabled). > > I got successful getting into 64bit mode and I'm trying to switch out of it > to 32bit protected mode. > > According to Intel document the first step is to "Switch to compatibility > mode" which after several efforts, I'm not able to do successfully. Although > I was successful in jumping in and out of compatibility mode from 32bit > protected mode (no-paging enabled). > > Only diff. betwn 64bit page-protected mode and compatibility mode is L and > D bit in code segment. In other words, (according to my understanding) if > I'm in 64bit mode and if I want to jump to compatibility mode, all I'm > suppose to do is to make far jump to compatibility mode Code-Segment (please > correct me if I'm wrong). The CPU freezes when I make the jump. > > While making jump, > 1) PML4 paging is still in place (hence, IA32_EFER.LMA = 1) > 2) PAE and PE is still enabled > 3) IA32_EFER.LME = 1 > > Can somebody please help me with this? Am I suppose to re-arrange paging or > do something about gdt? > > Thanks, > /tejas > > NOTE: When I jump back to 32bit protected mode, I want to keep paging > disabled. > > >
