On Fri, Oct 3, 2008 at 3:04 PM, yogeshwar sonawane <[EMAIL PROTECTED]> wrote: > Hi all, > > By default, all memory/RAM is cacheable by linux kernel /host CPU ? > What is the scenario with other OSes ?
Caching is a big topics. Even simple microcontroller like Blackfin processor (Media Processor) also implement complex caching algorithm involving some LRU scheme inside their architecture, let alone x86 processor, which have L3, L2, L1 caching. http://en.wikipedia.org/wiki/CPU_cache Different types of cache is discussed here: http://www.pcguide.com/ref/mbsys/cache/char.htm http://www.pcguide.com/ref/mbsys/cache/funcSummary-c.html UTLK3 does have some diagrams on cacheline and its implication for data alignment. And this paper (100+pages) is classic - which covers : http://people.redhat.com/drepper/cpumemory.pdf > If RAM is cacheable, then the memory-mapped IO regions of the > peripherals are also cacheable ? For I/O there are Write-through and write-back caching. -- Regards, Peter Teoh -- To unsubscribe from this list: send an email with "unsubscribe kernelnewbies" to [EMAIL PROTECTED] Please read the FAQ at http://kernelnewbies.org/FAQ
