I have a basic question regarding caching 1) Will peripheral device registers be cached in cache memory? 2) If not how caching is avoided for this address? 3) If yes how is asynchronous changes in hardware registers is getting reflected in value read from that register. #define __raw_readb(a) (__chk_io_ptr(a), *(volatile unsigned char __force *)(a)) #define __raw_writeb(v,a) (__chk_io_ptr(a), *(volatile unsigned char __force *)(a) = (v))
will volatile does that magic? I don't think so. Please correct me if I am wrong. Thanks in Advance Nobin -- To unsubscribe from this list: send an email with "unsubscribe kernelnewbies" to [email protected] Please read the FAQ at http://kernelnewbies.org/FAQ
