On Wed, Oct 14, 2020 at 04:42:08PM +0530, Sumit Garg wrote:
> Add support to handle SGIs as regular NMIs. As SGIs or IPIs defaults to a
> special flow handler: handle_percpu_devid_fasteoi_ipi(), so skip NMI
> handler update in case of SGIs.
>
> Also, enable NMI support prior to gic_smp_init() as allocation of SGIs
> as IRQs/NMIs happen as part of this routine.
>
> Signed-off-by: Sumit Garg <sumit.g...@linaro.org>
> ---
> drivers/irqchip/irq-gic-v3.c | 13 +++++++++++--
> 1 file changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
> index 16fecc0..5efc865 100644
> --- a/drivers/irqchip/irq-gic-v3.c
> +++ b/drivers/irqchip/irq-gic-v3.c
> @@ -477,6 +477,11 @@ static int gic_irq_nmi_setup(struct irq_data *d)
> if (WARN_ON(gic_irq(d) >= 8192))
> return -EINVAL;
>
> + if (get_intid_range(d) == SGI_RANGE) {
> + gic_irq_set_prio(d, GICD_INT_NMI_PRI);
> + return 0;
> + }
> +
> /* desc lock should already be held */
> if (gic_irq_in_rdist(d)) {
> u32 idx = gic_get_ppi_index(d);
> @@ -514,6 +519,11 @@ static void gic_irq_nmi_teardown(struct irq_data *d)
> if (WARN_ON(gic_irq(d) >= 8192))
> return;
>
> + if (get_intid_range(d) == SGI_RANGE) {
> + gic_irq_set_prio(d, GICD_INT_DEF_PRI);
> + return;
> + }
> +
> /* desc lock should already be held */
> if (gic_irq_in_rdist(d)) {
> u32 idx = gic_get_ppi_index(d);
> @@ -1708,6 +1718,7 @@ static int __init gic_init_bases(void __iomem
> *dist_base,
>
> gic_dist_init();
> gic_cpu_init();
> + gic_enable_nmi_support();
> gic_smp_init();
> gic_cpu_pm_init();
>
> @@ -1719,8 +1730,6 @@ static int __init gic_init_bases(void __iomem
> *dist_base,
> gicv2m_init(handle, gic_data.domain);
> }
>
> - gic_enable_nmi_support();
> -
> return 0;
>
> out_free:
> --
Looks good to me. Please feel free to add:
Reviewed-by: Masayoshi Mizuma <m.miz...@jp.fujitsu.com>
Thanks!
Masa
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