Le 11/09/2013 22:23, Lorenzo Marcantonio a écrit : > I noticed it was asked in the user list so I resuscitated it. > I did it to use 356 instead of gencad for board testing but in the end > the fabricator preferred gencad anyway... > > However, here it is: > - Tested only with 3 boards (only dual side), so stuff may be wrong. > Files are read correctly by both CAM350 and (an old version of) > gerbtool. Real network names in the CAM are actually useful. > > - Fixed function, no dialog. Simply asks for the output file. > I arbitrarily chose d356 as extension, another one found in the wild > is .ipc > > - Always uses the auxiliary axis and always marks via as tented (I think > these could be the only options) > > - Only does the old 356 format, *not* the 356A (however it seems the old > format is somewhat more supported); shouldn't be too difficult to > extend for the 356A format. > > - Outputs in decimils (i.e. CUST 0 format); gerbtool ignores the unit > parameter so CUST 0 is the only one it works for it (it seems there is > a race in suckitude between CAM vendors...) > > - It tries to be smart truncating network names, however there is no > check for other kind of string overflows (the refdes, in particular). > Coordinates however are clamped to the maximum representable (what > about bigger boards/features? there seems to be a scaling facility but > I guess nobody handle it correctly). > Extended characters in refdes/pin name could be a problem too (since > UTF would expand them and break the column alignment). > > Also, the specs are not anymore available, I did it using some PDF > I found around; some things are not clear (so they may be wrong); in > particular: > > - The mask specification seems to imply that the value specified > indicate the sides unavailable for probing; i.e. a tented via is 3 and > a THT pad is 0. > > - Side number for access code: 0 is both sides, 1 is primary size (i.e. > top) but the other layers? on a 'finished board' there is only the > bottom side but the specs talk about inner layer too. So I export > top as 1, bottom as num_copper_layers and the internal are between. > I'm doubtful about the testability of inner layers before laminating, > anyway... > > - I don't remember if I did the locale switching to C thing during the save; > however it only writes integers so it shouldn't be an issue. > > How it works: really simple... it looks over all the vias and all the > pins in the board and accumulates a vector with the info; then writes > the file using the vector (a bunch of printf). It could have written it > during the scan but later formats require a sorted vector, so I looked > forward to them. The only fancy thing is keeping a map of shortened > network names (one of the limitations of the format is only 14 > characters for the netname) > > Have fun
I committed your patch (with very minor changes). Thanks. But due to a mistake when sending the commit, I committed your patch under my name. I apologize. Sorry. -- Jean-Pierre CHARRAS _______________________________________________ Mailing list: https://launchpad.net/~kicad-developers Post to : [email protected] Unsubscribe : https://launchpad.net/~kicad-developers More help : https://help.launchpad.net/ListHelp
