Thanks for the explanation. It also seemed odd to me that SMD aluminum capacitors would have a bigger clearance than THT ones, but I guess it makes sense now.
I am amending the same rules as stated above but explicitly specifying the crystals. - Courtyard line has a width 0.05mm. This line is placed so that its clearance is measured from its center to the edges of pads and body, and its position is rounded on a grid of 0.05mm. - Courtyard clearance is 0.25mm except for components smaller than 0603 at 0.15mm, connectors, SMD canned capacitors and crystals at 0.5mm and BGA at 1.0mm. (IPC-7251, IPC-7351B) On Mon, Jan 19, 2015 at 2:55 AM, Lorenzo Marcantonio < [email protected]> wrote: > On Thu, Jan 15, 2015 at 04:44:38PM -0500, Carl Poirier wrote: > > Because that's what IPC-7351B says about can components. I don't think > they > > include the THT cans in this standard, but Lorenzo can confirm that one. > > (Or anyone else with access to the documents) > > > > On Thu, Jan 15, 2015 at 4:32 PM, nnn <[email protected]> wrote: > > > > > I don't understand the exception for aluminum capacitors. Does it > apply > > > to both THT and SMD? Why clearance for THT capacitors should be greater > > > than clearance for other THT? > > First thing: 7351 is only for SMD; THT are covered by 7251 (draft freely > available). AFAIK in 7251 you only have to decide if pinning is radial > or axial. However both the LP designer and the slides on the net are > based on the unpublished 7351C and the work-in-progress 7070 standard. > > If you look here > http://www.ipc.org/CommitteeDetail.aspx?Committee=5-21A, the Hausherr > guy is one of the leader so I'm expecting that some of the information > and stuff from LP designer is a preview for the incoming standard. In > other words, Mentor/PCB Libraries will always be ahead on the > implementation since they actually ratify the standards :P > > Second thing: the IPC tables are done by *experiment*, i.e. they > soldered an hellish number of board with different spacing and > statistically derived the optimal spacing/values/whatever. It's one of > the main reason for having them paying for the standard AFAIK. > > Also, the rule for canned capacitors applies to canned (2 pin) crystal too. > > The reason for the spacing isn't explained, but I think is due to the > balance/form factor of these parts (in fact, there is a specific > table for the taller parts). > > If you look at the construction for the L-ribbon leaded pins in > a typical canned capacitor, the body *doesn't* touch the board. It's all > suspended above the thin and reasonably tall pins, so there is > considerable leverage available for the cap (a common fault is the cap > tearing off the pads...). Also the pins are not flats but slightly > 'tented', unlike wound coils (no idea why). See here: > > http://s3-blogs.mentor.com/tom-hausherr/files/2010/10/under_bodyoutward_l_lead.png > > I think that the biggest courtyard is to allow for a slight movement of > the parts while unsoldered (paste is tacky, but it's not glue). Also if > the capacitor is tilted (other common failure during inspection) you > need a bigger space for rework it into position... > > -- > Lorenzo Marcantonio > Logos Srl > > _______________________________________________ > Mailing list: https://launchpad.net/~kicad-developers > Post to : [email protected] > Unsubscribe : https://launchpad.net/~kicad-developers > More help : https://help.launchpad.net/ListHelp >
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