Hi, Lately I've noticed a whole bunch of people coming into the IRC channel confused by the new behavior of cvpcb. Since it now pushes changes back to eeschema instead of writing a file, there is an extra step: you have to go back into eeschema and export the netlist again. A lot of people are seeing the "Cannot add new component due to missing footprint" messages and thinking there's a bug.
Any chance of adjusting this behavior before the release to stop the confusion? Perhaps cvpcb could trigger a netlist write on save, or maybe pcbnew could use kiway to see the update footprints and pull them in / warn about them. -- Chris _______________________________________________ Mailing list: https://launchpad.net/~kicad-developers Post to : [email protected] Unsubscribe : https://launchpad.net/~kicad-developers More help : https://help.launchpad.net/ListHelp
