Hi, On 30.06.2015 19:29, Andy Peters wrote:
>> Ideally, I'd like this as attributes on the component pins, and then >> either inherited directly or at least verified by the ERC. > One argument against making this a pin attribute rather than a net attribute: > FPGA pins can be single-ended or differential depending on the particular > design. I have an evil plan for that: per-instance configuration options. In the symbol, I'd like to allow alternative configurations for each pin, along with dependencies. This is most useful for connectors, which currently do not take part in ERC at all (by being declared "passive"); the per-instance configuration would allow pin types to be assigned without altering the component. For anything programmable, I/O lines can be narrowed down to "input" or "output"; I'd also like to give the user the option of using one of several names for the pin. E.g. if there is a dedicated SPI controller in the IC, there'd be a configuration "use the SPI controller", which sets up the pins as MISO (in), MOSI (out), SCLK (out) and CS (out), and a different configuration "use these pins as I/O", which would set them as "GPIO1" (bidi), "GPIO2" (bidi) etc., with the option of narrowing them down further. A differential pair would be another configuration. Simon
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