This happens when people insist on using that god-awful hidden power pin anti-feature that the lib maintainers still haven't removed, and they use CMOS and TTL parts in the same design or similar.
On Mon, Sep 07, 2015 at 11:01:12AM -0700, Andy Peters wrote: > > > On Sep 7, 2015, at 9:38 AM, Thor-Arne <[email protected]> wrote: > > > > I also think multiple netnames should be included in the ERC check. > > > > > > How should this be implemented ? > > Should power-nets be excluded as these very often has multiple netnames > > like VCC/+5V and GND/VEE ? > > Should the handeling of power nets be changed ? > > > > > > As it is today, I can see that this will cause complaints if VCC/+5V > > triggers the ERC to often. > > This needs to be deiscussed properly before a decission is made. > > I honestly don’t understand how any net can have more than one unique name in > a design. > > Why would a power net have multiple names? > > -a > _______________________________________________ > Mailing list: https://launchpad.net/~kicad-developers > Post to : [email protected] > Unsubscribe : https://launchpad.net/~kicad-developers > More help : https://help.launchpad.net/ListHelp _______________________________________________ Mailing list: https://launchpad.net/~kicad-developers Post to : [email protected] Unsubscribe : https://launchpad.net/~kicad-developers More help : https://help.launchpad.net/ListHelp
