Thanks very much for this, will definitely test it out once it hits the nightly PPA.
On 29 January 2016 at 17:29, jp charras <[email protected]> wrote: > Le 29/01/2016 16:57, Tomasz Wlostowski a écrit : >> On 29.01.2016 16:49, Chris Pavlina wrote: >>> Oh, it's definitely a dirty hack - but it's a dirty hack that is somewhat >>> necessary, and used to be possible, and now it's not, so... regression, >>> dude! >>> :) >>> >>> Yeah, yeah, I'm a spacebar heater, I know... :D >>> >>> https://xkcd.com/1172/ >>> >> No, you're not :) I perfectly agree with your reasoning and I'll add an >> option to disable component removal. >> >>> I'd argue that while using a footprint as a via is a dirty hack, the simple >>> concept of allowing footprints on the PCB that aren't on the schematic is >>> *not*. Lots of people want to be able to place things like mounting holes >>> without having to put them in the schematic. (Whether or not that's best >>> practice is beside the point, it's very common.) >> >> Most tools I've used require that the components on the schematic fully >> match the PCB, but they also allow drawing mounting holes as 'free' >> pads. This is another limitation of pcbnew - in Eagle/Altium you can >> just draw an arbitrary pad straight on the PCB. > > " In Kicad, it requires a footprint (and so the sch/pcb inconsistency)." > > This is not true. > In Pcbnew, pads can live outside a footprint. > (They are used in the pad properties editor) > > But without a footprint, you cannot manage easily the net of this pad. > Just because schematic knows only footprints, the net of the orphan pads > cannot be managed by the schematic. > > Therefore users have to manage the net of these orphan pads *by hand*. > and these pads create sch/pcb inconsistency > AFAIK, Altium has not solved this issue (sch/pcb inconsistency). > > To fix this kind of issue, we need a good idea, not just mimic what is > made in Eagle/Altium. > I have already used Altium, and worked with guys who are using Altium, > but I am not a Altium specialist. > I have seen some very good and powerful ideas (rooms), and some less > good ideas (Well, I was not impressed by ERC and net management) > > My preferred idea (I am not saying this is a good idea) is to consider > the board itself as a parent footprint these "orphan" pads. > > Power connections could be managed at schematic level by something like > a few test or connect points ( pins of the board, seen like a footprint) > connected to the nets (usually GND, VCC ...) we want to connect to > these "orphan" pads > Stitching vias could be some of these "orphan" pads. > You do not need a footprint by pad: only one footprint is enough. > > I am pretty sure this is not a lot of work to code that. > At least less than trying to manage stitching vias as standard vias. > >> >> Cheers, >> Tom > > > -- > Jean-Pierre CHARRAS > > _______________________________________________ > Mailing list: https://launchpad.net/~kicad-developers > Post to : [email protected] > Unsubscribe : https://launchpad.net/~kicad-developers > More help : https://help.launchpad.net/ListHelp _______________________________________________ Mailing list: https://launchpad.net/~kicad-developers Post to : [email protected] Unsubscribe : https://launchpad.net/~kicad-developers More help : https://help.launchpad.net/ListHelp
