On Tue, Aug 02, 2016 at 09:23:18PM +0200, Clemens Koller wrote: > Hello, Wayne! > > Below, I added some very visionary features which I have seen (more or > less miserably implemented) in some big design tools, which could affect > the file formats in the long-term view as well. > I am not sure if it's too early to think about that stuff now. Please decide. > > On 2016-08-02 15:14, Wayne Stambaugh wrote: > > So far here is the list of new file format features I am planning to > > implement: > > > > - Pin and gate swapping and mapping (defined). > > - Differential pair definition (undefined). > > + Match Length definitions including min/max/tolerance > > > > - Net class definitions. (undefined other than what we have in the board > > file format) > > - Font definition for text objects (defined). > > - Custom colors for all drawing objects (undefined but trivial). > > - Embedded and linked symbols (undefined but I've already have a > > definition in mind). > > - Custom properties for objects (defined, same as board file format). > > - Support for more than 2 body styles (defined). > > - Symbol types: normal, power, virtual (in BOM not in netlist), and > > net-tie (defined except for additional net-tie requirements). > > - Per file symbol library design (defined like the pretty footprint > > libraries). > > - Custom pads (undefined). > > > > Here is the list of possible features that I haven't made up my mind > > about yet: > > > > - Custom file units. > > - Layers. > > + Design partitions > Useful in the far future for Multi-Board Designs. > (Which is more than one PCB connected by a connector or a flex-print) > There might be nets which are global across all boards (i.e.GND) as well > as nets which have the same name but are local to one Partition (PCB) > (i.e. +3.3V from separate PoL-Supplies). > > Maybe: > + Support for schematic versioning / timestamping / diff- and git-friendly > I want to see (ideally in a graphical representation), what's the > difference of two schematics on logic/netlist level as well as visually > re-arranged circuits. > I believe that this could also affect the file format - or - some > hints stored in the file could make it much more easy to visualize > differences.
An external script was shared in IRC this morning that does this; I believe the author intends to share it publicly once it has a bit more polish. What sort of hints would you store? > > > Regards, > > Clemens > > _______________________________________________ > Mailing list: https://launchpad.net/~kicad-developers > Post to : [email protected] > Unsubscribe : https://launchpad.net/~kicad-developers > More help : https://help.launchpad.net/ListHelp _______________________________________________ Mailing list: https://launchpad.net/~kicad-developers Post to : [email protected] Unsubscribe : https://launchpad.net/~kicad-developers More help : https://help.launchpad.net/ListHelp
