Hopefully the following details will provide some additional clarification about the differing natures and roles of the solder mask and paste mask layers.
An example of where details on a solder mask layer and (associated) paste mask layer would *not* be the same involves (surface mount) pads which form part of an edge connector. (It is not uncommon for such pads to be gold plated (or more accurately, to normally have a very thin layer of gold on top of a thicker layer of tin), but that is another story.) Each such pad should be "exposed" on the solder mask layer (for the particular solder mask layer which is on the same side of the PCB as the particular (copper) layer that the pad concerned is located on), so that when a connector is actually mated with the associated edge connector, each of the pads concerned is not prevented from making electrical contact with the appropriate pin within that mating connector. On the other hand, each such pad should *not* be "exposed" on the paste mask layer (for the particular paste mask layer which is on the same side of the PCB as the particular (copper) layer that the pad concerned is located on). When solder paste is applied to a PCB (prior to actually installing components on it), such pads should *not* have any solder paste deposited on top of them -- because those pads are being provided to make contact with the pins within a connector which is mated with the associated edge connector, and as such, applying any solder paste to such pads would not be appropriate. Vias are similar to pads in that it is appropriate to specify appropriate details for the solder mask layers. But unlike pads though, vias are never "present" on either of the paste mask layers. The purpose of the paste mask layers is to control where solder paste is applied to PCBs, and as vias are provided to interconnect different copper layers, it is never appropriate to apply any solder paste to any of them. Regards, Geoff. --- In kicad-users@yahoogroups.com, Pedro Martin wrote: > > Hi, > > See pcbnew manual, chapter 5. > Mask: keep out varnish covering. To prevent varnish (or "mask") > covering of the pads. > Soldp: solder paste allow on smd components. Used to create screens > and stencils to applicate solder paste. > > Not exactly but almost, one is the negative of the other one. > > Pedro. > > > the "real" question is : > > > > what is the differnce between soldcomp& maskcomp ??? > > > > > > > > --- In kicad-users@yahoogroups.com, "Julien Bayle" wrote: > > > > > > hi all experts, > > > > > > I'm inside a big project: > > > http://www.julienbayle.net/diy/protodeck/ > > > > > > I finished one of the PCBs it requires and I'm very close to > > > order it from BatchPCB. > > > But I have some doubts with the gerber files. > > > > > > So, as usual, I read again the nice pcbnew.pdf, but some doubts > > > remain. > > > > > > Can we check together I'm ok ?? > > > > > > xxxxxx.copper.pho => all the "copper" for the bottom face (if > > > component are on top face ..) > > > xxxx.cmp.pho => all the "copper" for the top face (if component > > > are on top face ..) > > > xxxx.silkscmp.pho => silkscreen ... ok > > > xxxx.silkscu.pho => silkscreen ... ok > > > xxxx.soldpcmp.pho => what is it exactly ??? > > > xxxx.soldpcu.pho => what is it exactly ??? > > > xxxx.maskcmp.pho => what is it exactly? is it soldermask ? > > > i.e the place where the protection resin won't be ? > > > xxxx.maskcu.pho => what is it exactly? is it soldermask ? i.e > > > the place where the protection resin won't be ? > > > > > > I'd like to make the last check before to order. > > > > > > help would be appreciated. > > > > > > Julien
