OK so I used KiCad to design a couple of boards - on one the fabrication house told me that I have a problem with my design.
I have a few traces that are 15 mils that are connected between the top and bottom layers with a via - also 15 mils. The fabrication house told me to make the vias at least 12 mils bigger than the trace. I assume that's fairly standard. Does the DRC have any checks for vias size compared to connected trace size ???
