PLEASE SEND ME THE RESUME ASAP AT [email protected] Location : Irvine, CA Rate: $45 per hour Duration: 6-12 Months
Experience range: Preferably 2 to 7 years. No of Positions : 3 Job Description: 1. Verification (mandatory) a) Ability to architect and implemented automated verification environment and test cases / procedures (HDL-based: VHDL / Verilog). b) Experienced in requirements-based, targeted verification with traceability c) Experienced in achieving Code Coverage closure d) Familiar with DO-254 2. Design experience (preferred) a) Ability to translate requirements into design partitions, design units, FSMs b) Experience with Logic Synthesis, Static Timing Analysis and FPGA P&R 3. HDLs a) Verilog b) VHDL (preferred) 4. Experienced in Simulation Tools 5. Preferred skills - a) Familiar with DO-254-based development process- Configuration management, problem reporting and tracking b) Board-bring up and FPGA testing in hardware Thanks and Regards Sajid. Sr. Resource Manager || IT-SCIENT || Phone: 510.972.5242 || Cell: 408-459-2331|| Fax: 877.701.4872 || Email: [email protected] || Web: www.itscient.com || (Note: If urgent when I am unavailable you can always reach my group manager Brij at 510-972-5249 or email him at [email protected]) -- You received this message because you are subscribed to the Google Groups "KNOW.IT" group. To post to this group, send email to [email protected]. To unsubscribe from this group, send email to [email protected]. For more options, visit this group at http://groups.google.com/group/know_it_az?hl=en.
