"Mike" == Michael Corcoran <Michael.Corcoran at Sun.COM> writes:
Mike> On Thu, 2007-06-14 at 09:12 -0500, Dave Marquardt wrote: >> "Roland" == Roland Mainz <roland.mainz at nrubsig.org> writes: >> Roland> Dave Marquardt wrote: >> >> >> >> "dsc" == David Comay <David.Comay at Sun.COM> writes: >> >> dsc> Here are my comments for round "three": >> >> dsc> usr/src/cmd/ksh/Makefile.com >> >> dsc> Lines 101-109 - As I indicated in an earlier review, I don't dsc> believe this is necessary. Both Nevada and the Solaris 10 dsc> patch gate do large pages automatically (or so-called out of dsc> the box) and so including these options is unnecessary. dsc> However, I've cc'ed Bart Smaalders who is an expert in this dsc> area who can suggest whether or not it makes sense to include dsc> this. >> >> >> >> Just to be clear, this issue is about using -xpagesize_heap=64K and >> >> -xpagesize_stack=64K on SPARC. >> Roland> Right... >> Mike> Just to be even clearer, is this for all SPARC machines or just Mike> UltraSparc I and II machines? I believe it's in the Makefile in sparc_CFLAGS and sparcv9_CFLAGS, so I assume it applies to all SPARC machines. Mike> The TLB architecture on US-III+, US-IV, US-IV+ tends not to use 64K page Mike> sizes often due to the restriction of having essentially 2 pagesizes Mike> within a process that work well together. US-III may not work well with Mike> 2 page sizes though and thus we default to 8k in sun4u/cpu/us3_cheetah.c Mike> cpu_fiximp. Mike> The Niagara cpus I think can handle all page sizes equally well. Well, except 512KB and 32MB, which don't exist on Niagara 1. -- Dave Marquardt Sun Microsystems, Inc. Austin, TX +1 512 401-1077 (SUN internal: x64077)
