From: Avi Kivity <[email protected]>

Signed-off-by: Avi Kivity <[email protected]>

diff --git a/Documentation/kvm/timekeeping.txt 
b/Documentation/kvm/timekeeping.txt
index cbbc0d5..0c5033a 100644
--- a/Documentation/kvm/timekeeping.txt
+++ b/Documentation/kvm/timekeeping.txt
@@ -52,12 +52,12 @@ available, but not all modes are available to all timers, 
as only timer 2
 has a connected gate input, required for modes 1 and 5.  The gate line is
 controlled by port 61h, bit 0, as illustrated in the following diagram.
 
- --------------             ---------------- 
+ --------------             ----------------
 |              |           |                |
 |  1.1932 MHz  |---------->| CLOCK      OUT | ---------> IRQ 0
 |    Clock     |   |       |                |
  --------------    |    +->| GATE  TIMER 0  |
-                   |        ---------------- 
+                   |        ----------------
                    |
                    |        ----------------
                    |       |                |
@@ -66,7 +66,7 @@ controlled by port 61h, bit 0, as illustrated in the 
following diagram.
                    |    +->| GATE  TIMER 1  |
                    |        ----------------
                    |
-                   |        ---------------- 
+                   |        ----------------
                    |       |                |
                    |------>| CLOCK      OUT | ---------> Port 61h, bit 5
                            |                |      |
@@ -134,7 +134,7 @@ Command table:
 0001 - Set Timer 0 LSB mode for port 0x40
        set timer to read LSB only and force MSB to zero;
        mode bits set timer mode
-       
+
 0010 - Set Timer 0 MSB mode for port 0x40
        set timer to read MSB only and force LSB to zero;
        mode bits set timer mode
@@ -167,7 +167,7 @@ Command table:
        Bit 1 = Counter 0
 
        The output of ports 0x40-0x42 following this command will be:
-       
+
        Bit 7 = Output pin
        Bit 6 = Count loaded (0 if timer has expired)
        Bit 5-4 = Read / Write mode
@@ -610,4 +610,3 @@ by using CPU utilization itself as a signalling channel.  
Preventing such
 problems would require completely isolated virtual time which may not track
 real time any longer.  This may be useful in certain security or QA contexts,
 but in general isn't recommended for real-world deployment scenarios.
-
diff --git a/arch/s390/include/asm/Kbuild b/arch/s390/include/asm/Kbuild
index 1b937f8..287d7bb 100644
--- a/arch/s390/include/asm/Kbuild
+++ b/arch/s390/include/asm/Kbuild
@@ -5,6 +5,7 @@ header-y += chsc.h
 header-y += cmb.h
 header-y += dasd.h
 header-y += debug.h
+header-y += kvm_virtio.h
 header-y += monwriter.h
 header-y += qeth.h
 header-y += schid.h
@@ -12,4 +13,3 @@ header-y += tape390.h
 header-y += ucontext.h
 header-y += vtoc.h
 header-y += zcrypt.h
-header-y += kvm_virtio.h
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index a810d47..f47db25 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -1020,7 +1020,7 @@ static int kvm_write_guest_time(struct kvm_vcpu *v)
         * it is possible such a time value has already been observed by the
         * guest.  To protect against this, we must compute the system time as
         * observed by the guest and ensure the new system time is greater.
-        */
+        */
        max_kernel_ns = 0;
        if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
                max_kernel_ns = vcpu->last_guest_tsc -
@@ -2289,7 +2289,7 @@ static int kvm_dev_ioctl_get_supported_cpuid(struct 
kvm_cpuid2 *cpuid,
                do_cpuid_ent(&cpuid_entries[nent], func, 0,
                             &nent, cpuid->nent);
 
-       
+
 
        r = -E2BIG;
        if (nent >= cpuid->nent)
--
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