Ingo Molnar wrote: > there is a remote possibility that some OSs depend on certain devices > being level-triggered: for example if you get an IRQ from a > level-triggered device and _dont_ deassert that signal from the IRQ > handler (intentionally so), then the semantics of current hardware will > cause a second interrupt to be sent by the PIC, after the APIC message > has been EOI-ed in the local APIC. While such "repeat interrupts" would > be pure madness to rely on i think, i'm not sure it's not being done. > Note that if the same IO-APIC pin is set up to detect edges then not > deasserting the signal would not cause a 'repeat interrupt'. Whether > such accurate emulation of signalling is needed depends on the hardware > semantics of the devices we emulate. > >
Don't all OSes heavily depend on level-triggered interrupts for irq line sharing? -- Do not meddle in the internals of kernels, for they are subtle and quick to panic. ------------------------------------------------------------------------- Take Surveys. Earn Cash. Influence the Future of IT Join SourceForge.net's Techsay panel and you'll get the chance to share your opinions on IT & business topics through brief surveys-and earn cash http://www.techsay.com/default.php?page=join.php&p=sourceforge&CID=DEVDEV _______________________________________________ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
