On Wed, 2007-08-01 at 21:44 +0300, Avi Kivity wrote: > Rusty Russell wrote: > > According to my Intel manual, although lmsw only causes an exit when > > trying to set the bottom 4 bits, it is supposed to set the bottom 16 > > bits of cr0. > > > > > > Well, _my_ Intel manual (2A) says: > > > Loads the source operand into the machine status word, bits 0 through > > 15 of register CR0. The > > source operand can be a 16-bit general-purpose register or a memory > > location. Only the low- > > order 4 bits of the source operand (which contains the PE, MP, EM, and > > TS flags) are loaded
Damn, I should have kept reading. Sorry for the noise! Rusty. ------------------------------------------------------------------------- This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ _______________________________________________ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
