On Fri, 2007-08-17 at 05:18 -0700, Avi Kivity wrote: > Applied, thanks. > > Please keep opcodes in sorted order, and don't post patches in dos > format. > > Hi Avi, Attached is the patch, doing code cleanup. It keeps the emulation of op-codes in sorted order. Also removes the white-space before labels.
I don't see any reason for it to reach you in the dos format. I use evolution to send email, and I am sending it from my Linux desktop. Only thing is I have to go through the Exchange server to send email. Can you send back one of my patch? I will check what is happening. -- Thanks & Regards, Nitin Open Source Technology Center, Intel Corporation ----------------------------------------------------------------- The mind is like a parachute; it works much better when it's open
commit c609269ebc40e385ec5a82363d5ee4a49388776c
Author: Nitin A Kamble <[EMAIL PROTECTED]>
Date: Fri Aug 17 18:21:08 2007 -0700
Rearrange the emulation code so that opcodes stay in sorted order.
And rearrange the lables as per the kernel requirements.
Signed-off-by: Nitin A Kamble <[EMAIL PROTECTED]>
diff --git a/drivers/kvm/x86_emulate.c b/drivers/kvm/x86_emulate.c
index b4f439c..b196d25 100644
--- a/drivers/kvm/x86_emulate.c
+++ b/drivers/kvm/x86_emulate.c
@@ -782,7 +782,7 @@ done_prefixes:
goto srcmem_common;
case SrcMem:
src.bytes = (d & ByteOp) ? 1 : op_bytes;
- srcmem_common:
+srcmem_common:
src.type = OP_MEM;
src.ptr = (unsigned long *)cr2;
if ((rc = ops->read_emulated((unsigned long)src.ptr,
@@ -898,6 +898,18 @@ done_prefixes:
cmp: /* cmp */
emulate_2op_SrcV("cmp", src, dst, _eflags);
break;
+ case 0x58 ... 0x5f: /* pop reg */
+ dst.ptr = (unsigned long *)&_regs[b & 0x7];
+
+pop_instruction:
+ if ((rc = ops->read_std(register_address(ctxt->ss_base,
+ _regs[VCPU_REGS_RSP]), dst.ptr, op_bytes, ctxt->vcpu))
+ != 0)
+ goto done;
+
+ register_address_increment(_regs[VCPU_REGS_RSP], op_bytes);
+ no_wb = 1; /* Disable writeback. */
+ break;
case 0x63: /* movsxd */
if (mode != X86EMUL_MODE_PROT64)
goto cannot_emulate;
@@ -924,7 +936,7 @@ done_prefixes:
}
break;
case 0x84 ... 0x85:
- test: /* test */
+test: /* test */
emulate_2op_SrcV("test", src, dst, _eflags);
break;
case 0x86 ... 0x87: /* xchg */
@@ -960,7 +972,7 @@ done_prefixes:
_eip += ad_bytes; /* skip dst displacement */
break;
case 0x88 ... 0x8b: /* mov */
- case 0xc6 ... 0xc7: /* mov (sole member of Grp11) */
+mov:
dst.val = src.val;
break;
case 0x8f: /* pop (sole member of Grp1a) */
@@ -974,7 +986,7 @@ done_prefixes:
register_address_increment(_regs[VCPU_REGS_RSP], dst.bytes);
break;
case 0xc0 ... 0xc1:
- grp2: /* Grp2 */
+grp2: /* Grp2 */
switch (modrm_reg) {
case 0: /* rol */
emulate_2op_SrcB("rol", src, dst, _eflags);
@@ -1000,6 +1012,8 @@ done_prefixes:
break;
}
break;
+ case 0xc6 ... 0xc7: /* mov (sole member of Grp11) */
+ goto mov;
case 0xd0 ... 0xd1: /* Grp2 */
src.val = 1;
goto grp2;
@@ -1200,24 +1214,12 @@ special_insn:
case 0xae ... 0xaf: /* scas */
DPRINTF("Urk! I don't handle SCAS.\n");
goto cannot_emulate;
- case 0xf4: /* hlt */
- ctxt->vcpu->halt_request = 1;
- goto done;
case 0xc3: /* ret */
dst.ptr = &_eip;
goto pop_instruction;
- case 0x58 ... 0x5f: /* pop reg */
- dst.ptr = (unsigned long *)&_regs[b & 0x7];
-
-pop_instruction:
- if ((rc = ops->read_std(register_address(ctxt->ss_base,
- _regs[VCPU_REGS_RSP]), dst.ptr, op_bytes, ctxt->vcpu))
- != 0)
- goto done;
-
- register_address_increment(_regs[VCPU_REGS_RSP], op_bytes);
- no_wb = 1; /* Disable writeback. */
- break;
+ case 0xf4: /* hlt */
+ ctxt->vcpu->halt_request = 1;
+ goto done;
}
goto writeback;
@@ -1311,6 +1313,16 @@ twobyte_insn:
/* Odd cmov opcodes (lsb == 1) have inverted sense. */
no_wb ^= b & 1;
break;
+ case 0xa3:
+bt: /* bt */
+ src.val &= (dst.bytes << 3) - 1; /* only subword offset */
+ emulate_2op_SrcV_nobyte("bt", src, dst, _eflags);
+ break;
+ case 0xab:
+bts: /* bts */
+ src.val &= (dst.bytes << 3) - 1; /* only subword offset */
+ emulate_2op_SrcV_nobyte("bts", src, dst, _eflags);
+ break;
case 0xb0 ... 0xb1: /* cmpxchg */
/*
* Save real source value, then compare EAX against
@@ -1328,30 +1340,15 @@ twobyte_insn:
dst.ptr = (unsigned long *)&_regs[VCPU_REGS_RAX];
}
break;
- case 0xa3:
- bt: /* bt */
- src.val &= (dst.bytes << 3) - 1; /* only subword offset */
- emulate_2op_SrcV_nobyte("bt", src, dst, _eflags);
- break;
case 0xb3:
- btr: /* btr */
+btr: /* btr */
src.val &= (dst.bytes << 3) - 1; /* only subword offset */
emulate_2op_SrcV_nobyte("btr", src, dst, _eflags);
break;
- case 0xab:
- bts: /* bts */
- src.val &= (dst.bytes << 3) - 1; /* only subword offset */
- emulate_2op_SrcV_nobyte("bts", src, dst, _eflags);
- break;
case 0xb6 ... 0xb7: /* movzx */
dst.bytes = op_bytes;
dst.val = (d & ByteOp) ? (u8) src.val : (u16) src.val;
break;
- case 0xbb:
- btc: /* btc */
- src.val &= (dst.bytes << 3) - 1; /* only subword offset */
- emulate_2op_SrcV_nobyte("btc", src, dst, _eflags);
- break;
case 0xba: /* Grp8 */
switch (modrm_reg & 3) {
case 0:
@@ -1364,6 +1361,11 @@ twobyte_insn:
goto btc;
}
break;
+ case 0xbb:
+btc: /* btc */
+ src.val &= (dst.bytes << 3) - 1; /* only subword offset */
+ emulate_2op_SrcV_nobyte("btc", src, dst, _eflags);
+ break;
case 0xbe ... 0xbf: /* movsx */
dst.bytes = op_bytes;
dst.val = (d & ByteOp) ? (s8) src.val : (s16) src.val;
@@ -1375,14 +1377,14 @@ twobyte_special_insn:
/* Disable writeback. */
no_wb = 1;
switch (b) {
+ case 0x06:
+ emulate_clts(ctxt->vcpu);
+ break;
case 0x09: /* wbinvd */
break;
case 0x0d: /* GrpP (prefetch) */
case 0x18: /* Grp16 (prefetch/nop) */
break;
- case 0x06:
- emulate_clts(ctxt->vcpu);
- break;
case 0x20: /* mov cr, reg */
if (modrm_mod != 3)
goto cannot_emulate;
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