Steffen Winterfeldt wrote: > Hi, > > sorry for the delay, but I've been on vacation. :-) >
No worries :-) >> You're right. Good catch! >> > > Actually that is not true. 'mov eax,ss' does implicitly clear the upper > 16 bits (both processor docs and hardware agree here). > I wasn't able to find anything definitive in my manuals but I didn't look very hard. I figured that erring on the safe side is better anyway. > Anyway, ss is already saved, so no need for an extra register. Here is > my version (tested and works on my machine): > This patch works for me under KVM. Thanks! Regards, Anthony Liguori > --- bincode.asm (revision 650) > +++ bincode.asm (working copy) > @@ -15546,7 +15546,11 @@ > mov ax,pm_seg.prog_d16 > mov ds,ax > > - mov eax,ss > + ; needed for KVM: > + ; ss:rpl must equal cs:rpl in PM for VT. We can't rely on ss > + ; maintaining its value after the transition. > + > + movzx eax,word [rm_seg.ss] > and esp,0ffffh > shl eax,4 > add esp,eax > > ------------------------------------------------------------------------- This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ _______________________________________________ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
