>N+1, for me is that synchronous device emulation (like pio and mmio) >happens in in the vcpu thread and asynchronous device emulation >(handling signals in qemu, performing dma, and injecting interrupts) >happens in the device thread. This minimizes context switching and >heavyweight exits. > If this is true, then the N+1 thread won't be able to execute qemu_system_reset which is in VCPU contents, nor can asyn I/O call back APIs.
Thx,eddie ------------------------------------------------------------------------- This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/ _______________________________________________ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
