On Thu, Jan 31, 2008 at 12:44:10AM +0530, Balaji Rao wrote: > On Wednesday 30 January 2008 11:56:25 pm Andi Kleen wrote: > > There is no really an architectural PMU if you consider > > boxes beyond relatively new Intel CPUs (which got one) > > > But since kvm runs only on such CPUs, it should not really be a problem in > migrating between various Intel models at least.
I'm not 100% sure, but I think there are P4 based (Family 15) CPUs which have VT but not ArchPerfMon. AFAIK ArchPerfMon is only in Family 6 CPUs. Family 15 has a completely different PerfMon interface. > > But on the other hand in my experience most PMU users use > > relatively simple few counters (e.g. 90+% likely the local > > variant of CPU_CYCLES_NONHALTED) so it would be in theory > > possible to translate those by traps from a different CPU's > > format in the monitor into the local MSR. > > > > The only trouble is that is no architectural way to tell > > the guest "i support only counter X Y Z" and also no > > nice way to reject a particular counter except for just > > not ticking. > Can't this be exported through CPUID ? Sure it could, but that would be a new interface. If you were free to define a new interface you could also just go completely hypercall based. -Andi ------------------------------------------------------------------------- This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/ _______________________________________________ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
