On Fri, Feb 22, 2008 at 08:45:00PM +0200, Avi Kivity wrote:
> Marcelo Tosatti wrote:
> >Another source of problems in this area is that the TSC_OFFSET is
> >initialized to represent zero at different times for VCPU0 (at boot) and
> >the remaining ones (at APIC_DM_INIT).
> >
> >  
> 
> I added tsc sync in the guest bios some time ago, so this should be 
> solved now.
> 
> >>This will improve tsc quality for those machines, but we can't depend on 
> >>it, since some machines don't have constant tsc.  Further, I don't think 
> >>really large machines can have constant tsc since clock distribution 
> >>becomes difficult or impossible.
> >>    
> >
> >As discussed earlier, in case the host kernel does not have the TSC
> >stable, it needs to enforce a state which the guest OS will not trust
> >the TSC. The easier way to do that is to fake a C3 state. However, QEMU
> >does not emulate IO port based wait. This appears to be the reason for
> >the high-CPU-usage-on-idle with Windows guests, fixed by disabling C3
> >reporting on rombios (commit cb98751267c2d79f5674301ccac6c6b5c2e0c6b5 of
> >kvm-userspace).
> >
> >  
> 
> Oh.  Can you point me at documentation for the io port wait thing?

ACPI spec 3.0b section 4.7.3.5. Reading LVL2 or LVL3 register will cause
the processor to enter the specified C state.

See drivers/acpi/processor_idle.c::acpi_idle_do_entry.

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