On Mon, Apr 07, 2008 at 11:06:10PM -0500, Hollis Blanchard wrote:
> On Monday 07 April 2008 22:54:41 David Gibson wrote:
> > On Mon, Apr 07, 2008 at 10:25:32PM -0500, Hollis Blanchard wrote:
> > > On Monday 07 April 2008 20:11:28 David Gibson wrote:
> > > > On Mon, Apr 07, 2008 at 03:53:33PM -0500, Hollis Blanchard wrote:
> > > > > 1 file changed, 7 insertions(+)
> > > > > include/linux/kvm.h | 7 +++++++
> > > > >
> > > > >
> > > > > Device Control Registers are essentially another address space found
> > > > > on PowerPC 4xx processors, analogous to PIO on x86. DCRs are always
> > > > > 32 bits, and are identified by a 32-bit number.
> > > >
> > > > Well... 10-bit, actually.
> > >
> > > The mtdcrux description in the ppc440x6 user manual says the following:
> > >
> > > Let the contents of register RA denote a Device Control Register.
> > > The contents of GPR[RS] are placed into the designated Device Control
> > > Register.
> > >
> > > I take that to mean that we must worry about 32 bits worth of DCR
> > > numbers. Perhaps I should say "no more than" rather than "always".
> >
> > I think that's less misleading. mtdcrux is very new, anything which
> > only has the mtdcr instruction certainly can't take DCR numbers above
> > 10 bits, and I would expect that even on chips with mtdcrux the DCR
> > bus is probably still only 10-bits, although it could be extended.
>
> We're defining a kernel/userspace interface here, and since the hardware is
> capable of 32-bit DCR numbers, I don't think it makes any sense to not
> support that. Also, we would just end up placing that number into a u32
> anyways, so... :)
Oh, of course you should represent it as a u32 and support 32-bit
addresses, it's only the patch comment I'm objecting to.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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