On Thu, 31 Mar 2011 12:11:48 +0200 Alexander Graf <[email protected]> wrote:
> >>>>>>> On 31.03.2011, at 05:21, Liu Yu-B13201 wrote: > >>>>>>> > >>>>>>>> > >>>>>>>> I think the patch miss the bit to handle the case that > >>>>>>>> if guest clear the MSR_SPE. Doh. > >>>> So that MSR[SPE] should always be traped. > >>> > >>> It doesn't have to be trapped - we can enable it lazily on > >>> SPE_UNAVAIL :). Of course we should also explicitly enable it > >>> on set_msr. I don't see any benefit to doing this, if we're going to take a trap one way or another. Since we need to trap on clearing it anyway, might as well just keep things simple and have SPE always be a trapworthy MSR bit. > Scott, to verify that I don't completely screw up the lazy FPU work back when > I did it, I wrote some small test program that would just initialize an fpu > register with a value and then constantly loop to verify if it's still the > same. I ran that program with different values on the host and guest sides. > That exposed quite a lot of glitches. > > It would be nice if you could provide something similar for the SPE patches, > so we have some more faith in it :). OK. -Scott -- To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
