> -----Original Message-----
> From: [email protected] [mailto:kvm-ppc-
> [email protected]] On Behalf Of Alexander Graf
> Sent: Tuesday, September 27, 2011 9:39 PM
> To: Bhushan Bharat-R65777
> Cc: Wood Scott-B07421; Liu Yu-B13201; [email protected]
> Subject: Re: [PATCH 5/5] KVM: PPC: booke: Improve timer register
> emulation
> 
> 
> On 27.09.2011, at 18:01, Bhushan Bharat-R65777 wrote:
> 
> >
> >
> >> -----Original Message-----
> >> From: [email protected] [mailto:kvm-ppc-
> >> [email protected]] On Behalf Of Alexander Graf
> >> Sent: Tuesday, September 27, 2011 1:45 PM
> >> To: Wood Scott-B07421
> >> Cc: Liu Yu-B13201; Wood Scott-B07421; [email protected]
> >> Subject: Re: [PATCH 5/5] KVM: PPC: booke: Improve timer register
> >> emulation
> >>
> >>
> >> On 27.09.2011, at 02:44, Scott Wood wrote:
> >>
> >>> On 09/24/2011 02:27 AM, Alexander Graf wrote:
> >>>> I think I'm getting your point. So what we want is:
> >>>>
> >>>> in timer handler:
> >>>>
> >>>> set_bit(TSR_DIS, vcpu->arch.tsr);
> >>>> kvm_make_request(KVM_REQ_PPC_TSR_UPDATE, vcpu);
> >>>> kvm_vcpu_kick(vcpu);
> >
> > Still there can be a case where first request not handled and another
> event happens? Or we would like to pause till first request is handled by
> vcpu?
> 
> If the first DIS request is not handled and another event happens, the
> interrupts get coalesced (like on real hardware). If there is another TSR
> bit set still, int_pending should still be active and the guest exits the
> next time it sets MSR_EE, making us inject the next interrupt.
> 

This may not work for watchdog, where every event causes a state change.

Thanks
-Bharat

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