Avi Kivity wrote:
> Xu, Anthony wrote:
>> Hi Avi and all
>>
>> This is the revised one,
>>
>> All PCI devices send interrupt to both PIC and IOAPIC,
>> a). When PIC is enabled and IOAPIC is disabled, all redirect
>> entries in IOAPIC are masked. B) When PIC is disabled and IPAPIC is
>> enabled, link entry bit7 is set, means this link entry is disable.
>> Guest OS need to guarantee PIC and IOAPIC are not enabled in the same
>> time. Otherwise cause many suspicious interrupt to guest.
>>
>> Test by running guest linux in kvm/ia32 and kvm/ia64.
>>
>>
>>
>
> Looks good.
>
>> diff --git a/qemu/hw/apic.c b/qemu/hw/apic.c
>> index a14cab2..c3014fa 100644
>> --- a/qemu/hw/apic.c
>> +++ b/qemu/hw/apic.c
>> @@ -1053,9 +1053,25 @@ static void ioapic_service(IOAPICState *s)
>> } }
>>
>> +int ioapic_map_irq(int devfn, int irq_num)
>> +{
>> + int irq;
>> + irq = ((devfn >> 3) & 7) + 16;
>> + return irq;
>> +}
>> +#ifdef KVM_CAP_IRQCHIP
>> +static int ioapic_irq_count[IOAPIC_NUM_PINS];
>> +#endif
>> +
>> void ioapic_set_irq(void *opaque, int vector, int level) {
>> IOAPICState *s = opaque;
>> +#ifdef KVM_CAP_IRQCHIP
>> + ioapic_irq_count[vector] += level;
>> + if (kvm_enabled())
>> + if (kvm_set_irq(vector, ioapic_irq_count[vector] == 0)) +
>> return; +#endif
>>
>
> I think this can be done more cleanly using the qemu_irq
> infrastructure. qem_irq_invert can do the inversion, and to get the
> "irq fork", you can have a qemu_irq instance that forwards its
> argument to two other qemu_irq instances.
I'm thinking how to make it clean and generic
>
> There shouldn't be any #ifdef KVM_CAP_IRQCHIPs in there - it should
> work for plain qemu as well (well, if we fix qemu ioapic polarity
> code).
Agree
>
>> diff --git a/qemu/hw/piix_pci.c b/qemu/hw/piix_pci.c
>> index 90cb3a6..96316ca 100644
>> --- a/qemu/hw/piix_pci.c
>> +++ b/qemu/hw/piix_pci.c
>> @@ -225,6 +226,9 @@ static void piix3_set_irq(qemu_irq *pic, int
>> irq_num, int level) /* now we change the pic irq level
>> according to the piix irq mappings */ /* XXX: optimize */
>> pic_irq = piix3_dev->config[0x60 + irq_num];
>> + /* if bit7 set 1, this link is disabled */
>> + if (pic_irq & 0x80)
>> + return;
>>
>
> Already caught by the test below... hacky.
Didn't see that, thanks
>
>> if (pic_irq < 16) {
>> /* The pic level is the logical OR of all the PCI irqs
>> mapped to it */
--
To unsubscribe from this list: send the line "unsubscribe kvm" in
the body of a message to [EMAIL PROTECTED]
More majordomo info at http://vger.kernel.org/majordomo-info.html
