Index: qemu/hw/apic.c
===================================================================
--- qemu.orig/hw/apic.c	2008-11-01 14:51:32.000000000 +0000
+++ qemu/hw/apic.c	2008-11-01 14:57:54.000000000 +0000
@@ -87,6 +87,7 @@
     uint32_t initial_count;
     int64_t initial_count_load_time, next_time;
     QEMUTimer *timer;
+    qemu_irq *cpu_SIPI;
 } APICState;
 
 struct IOAPICState {
@@ -429,19 +430,7 @@
     cpu_reset(s->cpu_env);
 
     if (!(s->apicbase & MSR_IA32_APICBASE_BSP))
-        s->cpu_env->halted = 1;
-}
-
-/* send a SIPI message to the CPU to start it */
-static void apic_startup(APICState *s, int vector_num)
-{
-    CPUState *env = s->cpu_env;
-    if (!env->halted)
-        return;
-    env->eip = 0;
-    cpu_x86_load_seg_cache(env, R_CS, vector_num << 8, vector_num << 12,
-                           0xffff, 0);
-    env->halted = 0;
+        qemu_irq_lower(s->cpu_SIPI[0]);
 }
 
 static void apic_deliver(APICState *s, uint8_t dest, uint8_t dest_mode,
@@ -484,7 +473,7 @@
 
         case APIC_DM_SIPI:
             foreach_apic(apic_iter, deliver_bitmask,
-                         apic_startup(apic_iter, vector_num) );
+                         qemu_irq_raise(apic_iter->cpu_SIPI[vector_num]) );
             return;
     }
 
@@ -869,7 +858,7 @@
     apic_mem_writel,
 };
 
-int apic_init(CPUState *env)
+int apic_init(CPUState *env, qemu_irq *cpu_SIPI)
 {
     APICState *s;
 
@@ -883,6 +872,7 @@
     env->cpuid_apic_id = s->id;
     s->cpu_env = env;
 
+    s->cpu_SIPI = cpu_SIPI;
     apic_reset(s);
 
     /* XXX: mapping more APICs at the same memory location */
Index: qemu/hw/pc.c
===================================================================
--- qemu.orig/hw/pc.c	2008-11-01 14:51:32.000000000 +0000
+++ qemu/hw/pc.c	2008-11-01 14:57:13.000000000 +0000
@@ -49,6 +49,9 @@
 
 #define MAX_IDE_BUS 2
 
+#define MAX_CPUS 256
+#define MAX_SIPIS 256
+
 static fdctrl_t *floppy_controller;
 static RTCState *rtc_state;
 static PITState *pit;
@@ -134,6 +137,27 @@
     }
 }
 
+/* send a SIPI message to the CPU to start it */
+static void cpu_set_SIPI(void *opaque, int vector_num, int level)
+{
+    CPUState *env = opaque;
+
+    if (level) {
+        if (!env->halted)
+            return;
+        env->eip = 0;
+        cpu_x86_load_seg_cache(env, R_CS, vector_num << 8, vector_num << 12,
+                               0xffff, 0);
+        env->halted = 0;
+    } else {
+        env->halted = 1;
+    }
+}
+
+static void dummy_cpu_set_SIPI(void *opaque, int vector_num, int level)
+{
+}
+
 /* PC cmos mappings */
 
 #define REG_EQUIPMENT_BYTE          0x14
@@ -745,6 +769,7 @@
     int index;
     BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
     BlockDriverState *fd[MAX_FD];
+    qemu_irq *cpu_SIPI[MAX_CPUS];
 
     if (ram_size >= 0xe0000000 ) {
         above_4g_mem_size = ram_size - 0xe0000000;
@@ -777,11 +802,15 @@
             env->cpuid_features |= CPUID_APIC;
         }
         qemu_register_reset(main_cpu_reset, env);
+        cpu_SIPI[i] = qemu_allocate_irqs(cpu_set_SIPI, env, MAX_SIPIS);
         if (pci_enabled) {
-            apic_init(env);
+            apic_init(env, cpu_SIPI[i]);
         }
     }
 
+    for (i = smp_cpus; i < MAX_CPUS; i++)
+        cpu_SIPI[i] = qemu_allocate_irqs(dummy_cpu_set_SIPI, NULL, MAX_SIPIS);
+
     vmport_init();
 
     /* allocate RAM */
Index: qemu/hw/pc.h
===================================================================
--- qemu.orig/hw/pc.h	2008-11-01 14:51:32.000000000 +0000
+++ qemu/hw/pc.h	2008-11-01 14:57:02.000000000 +0000
@@ -40,7 +40,7 @@
 /* APIC */
 typedef struct IOAPICState IOAPICState;
 
-int apic_init(CPUState *env);
+int apic_init(CPUState *env, qemu_irq *cpu_SIPI);
 int apic_accept_pic_intr(CPUState *env);
 void apic_deliver_pic_intr(CPUState *env, int level);
 int apic_get_interrupt(CPUState *env);