On Thu, Oct 23, 2014 at 04:34:46PM +0200, Paolo Bonzini wrote:
> On 10/23/2014 05:02 AM, Chao Peng wrote:
> > Add AVX512 feature bits, register definition and corresponding
> > xsave/vmstate support.
> >
> > Signed-off-by: Chao Peng <[email protected]>
> > ---
> > target-i386/cpu.c | 10 ++++--
> > target-i386/cpu.h | 61 ++++++++++++++++++++++++++++++++++
> > target-i386/kvm.c | 19 +++++++++++
> > target-i386/machine.c | 87
> > +++++++++++++++++++++++++++++++++++++++++++++++++
> > 4 files changed, 175 insertions(+), 2 deletions(-)
>
> Looks good---Eduardo, Juan, can you look at it too? Documentation is at
>
> https://software.intel.com/sites/default/files/managed/68/8b/319433-019.pdf
>
> See Tables 2-5, 3-6, 3-7, 3-8.
Also, if anybody is confused by the TARGET_X86_64 #ifdefs, see section
1.2.2 32 SIMD Register Support ("The number of available vector
registers in 32-bit mode is still 8").
--
Eduardo
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