On 13 January 2015 at 12:04, Christoffer Dall <[email protected]> wrote: > Additionally, I haven't been able to think of a reasonable guest > scenario where this breaks. Once the guest turns on its MMU it should > deal with the necessary icache invalidation itself (I think), so we're > really talking about situations where the stage-1 MMU is off, and I > gather that mostly you'll be seeing a single core doing any heavy > lifting and then secondary cores basically coming up, only seeing valid > entries in the icache, and doing the necessary invalidat+turn on mmu > stuff.
The trouble with that is that as the secondary comes up, before it turns on its icache its VA->PA mapping is the identity map; whereas the primary vCPU's VA->PA mapping is "whatever the guest kernel's usual mapping is". If the kernel has some mapping other than identity for the VA which is wherever the secondary-CPU-startup-to-MMU-enable code lives (which seems quite likely), then you have potential problems. -- PMM -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
