On 09/10/2015 14:55, Peter Zijlstra wrote: > On Fri, Oct 09, 2015 at 12:21:55PM +0000, Kosuke Tatsukawa wrote: > >> + * Memory barrier is required here to make sure change to >> + * vcpu->async_pf.done is visible from other CPUs. This memory >> + * barrier pairs with prepare_to_wait's set_current_state() > > That is not how memory barriers work; they don't 'make visible'. They > simply ensure order between operations. > > X = Y = 0 > > CPU0 CPU1 > > [S] X=1 [S] Y=1 > MB MB > [L] y=Y [L] x=X > > assert(x || y) > > The issue of the memory barrier does not mean the store is visible, it > merely means that the load _must_ happen after the store (in the above > scenario). > > This gives a guarantee that not both x and y can be 0. Because either > being 0, means the other has not yet executed and must therefore observe > your store. > > Nothing more, nothing less. > > So your comment is misleading at best.
Yeah, I will just reword the comment when applying. Thanks Kosuke-san for your contribution! Paolo -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
