On Tue, 24 Nov 2015 16:43:58 +0100
Christoffer Dall <christoffer.d...@linaro.org> wrote:

> We were setting the physical active state on the GIC distributor in a
> preemptible section, which could cause us to set the active state on
> different physical CPU from the one we were actually going to run on,
> hacoc ensues.
> 
> Since we are no longer descheduling/scheduling soft timers in the
> flush/sync timer functions, simply moving the timer flush into a
> non-preemptible section.
> 
> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org>
> ---
>  arch/arm/kvm/arm.c | 7 +------
>  1 file changed, 1 insertion(+), 6 deletions(-)
> 
> diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
> index eab83b2..e06fd29 100644
> --- a/arch/arm/kvm/arm.c
> +++ b/arch/arm/kvm/arm.c
> @@ -564,17 +564,12 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, 
> struct kvm_run *run)
>                       vcpu_sleep(vcpu);
>  
>               /*
> -              * Disarming the background timer must be done in a
> -              * preemptible context, as this call may sleep.
> -              */
> -             kvm_timer_flush_hwstate(vcpu);
> -
> -             /*
>                * Preparing the interrupts to be injected also
>                * involves poking the GIC, which must be done in a
>                * non-preemptible context.
>                */
>               preempt_disable();
> +             kvm_timer_flush_hwstate(vcpu);
>               kvm_vgic_flush_hwstate(vcpu);
>  
>               local_irq_disable();

Reviewed-by: Marc Zyngier <marc.zyng...@arm.com>

        M.
-- 
Jazz is not dead. It just smells funny.
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