On Tue, Dec 08, 2015 at 09:57:21AM +0300, Pavel Fedin wrote:
> Hello!
>
> > I messed up the "load into xzr" test royally in the last attached patch.
> > It was quite wrong.
>
> Yes, because "mov %0, xzr" is not trapped.
>
> > I have now tested
> >
> > asm volatile(
> > "str %3, [%1]\n\t"
> > "ldr wzr, [%1]\n\t"
> > "str wzr, [%2]\n\t"
> > "ldr %0, [%2]\n\t"
> > :"=r"(val):"r"(addr), "r"(addr2), "r"(0x55555555):"memory");
> > report("mmio: 'ldr wzr' check: read 0x%08lx", val != 0x55555555, val);
> >
> > which passes
>
> I guess i forgot to mention that both addr and addr2 have to be MMIO
> registers. If they are plain memory, then of course everything
> will work because they are not trapped.
Yes, my round two (which still didn't fail) used mmio for both addr and
addr2.
>
> > Anyway, I
> > probably won't clean this test up and post it. I don't think we really
> > need to add it as a regression test, unless others disagree and would
> > like to see it added.
>
> Considering how difficult it was to find this problem, and how tricky and
> unobvious it is, i would ask to add this test. Especially
> considering you've already written it. At least it will serve as a reminder
> about the problem.
OK. I need to wrap up some other work right now, but then I'll clean
this patch up and send it properly.
Thanks,
drew
>
> Kind regards,
> Pavel Fedin
> Expert Engineer
> Samsung Electronics Research center Russia
>
>
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