Avi,
This patch breaks WinVista.64 install.
On Wed, Apr 28, 2010 at 04:47:19PM +0300, Avi Kivity wrote:
> When EPT is enabled, we cannot emulate EFER.NX=0 through the shadow page
> tables. This causes accesses through ptes with bit 63 set to succeed instead
> of failing a reserved bit check.
>
> Signed-off-by: Avi Kivity <a...@redhat.com>
> ---
> arch/x86/kvm/vmx.c | 11 +++++++++++
> 1 files changed, 11 insertions(+), 0 deletions(-)
>
> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> index ae22dcf..cc78fee 100644
> --- a/arch/x86/kvm/vmx.c
> +++ b/arch/x86/kvm/vmx.c
> @@ -678,6 +678,17 @@ static bool update_transition_efer(struct vcpu_vmx *vmx,
> int efer_offset)
> guest_efer |= host_efer & ignore_bits;
> vmx->guest_msrs[efer_offset].data = guest_efer;
> vmx->guest_msrs[efer_offset].mask = ~ignore_bits;
> +
> + clear_atomic_switch_msr(vmx, MSR_EFER);
> + /* On ept, can't emulate nx, and must switch nx atomically */
> + if (enable_ept && ((vmx->vcpu.arch.efer ^ host_efer) & EFER_NX)) {
> + guest_efer = vmx->vcpu.arch.efer;
> + if (!(guest_efer & EFER_LMA))
> + guest_efer &= ~EFER_LME;
> + add_atomic_switch_msr(vmx, MSR_EFER, guest_efer, host_efer);
> + return false;
> + }
> +
> return true;
> }
>
> --
> 1.7.0.4
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