Avi Kivity wrote:
> On 06/07/2010 11:43 AM, Lai Jiangshan wrote:
>> Avi Kivity wrote:
>>   
>>> The kvm mmu synchronizes shadow ptes using the mmu lock, however the cpu
>>> will happily ignore the lock when setting the accessed bit.  This can
>>> cause
>>> the accessed bit to be lost.  Luckily this only results in incorrect
>>> page
>>> selection for swap.
>>>
>>>      
>> Atomic operation is heavy and slow, it hurts performance.
>> Incorrect page selection for swap also hurts performance.
>>    
> 
> We can avoid the exchange in most cases, for example if the new spte has
> the accessed bit set (already in the patch set) or if the page is
> already marked as accessed, or if we see the old spte has the accessed
> bit set (so no race can occur).  I'll update the patches to avoid
> atomics when possible.

Umm, the reason that we need atomics here is to avoid vcpu to update spte when 
we read A bit
form it, so, perhaps we can use below way to avoid atomics completely:

- set reserved bit in spte
- get A bit form spte
- set new spte

the worst case is cause vcpu #PF here, but it doesn't matter since the old 
mapping is already invalid,
also need a remote tlb flush later.

> 
> I don't think atomics are that expensive, though, ~20 cycles on modern
> processors?
> 

Yes, but atomics are "LOCK" instructions, it can stop multiple cpus runing in 
parallel.
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