On Sun, Oct 10, 2010 at 02:47:43PM +0200, Avi Kivity wrote:
> On 10/07/2010 07:53 PM, Gleb Natapov wrote:
> >On Thu, Oct 07, 2010 at 02:42:06PM +0200, Avi Kivity wrote:
> >> On 10/04/2010 05:56 PM, Gleb Natapov wrote:
> >> >Guest enables async PF vcpu functionality using this MSR.
> >> >
> >> > return NON_PRESENT;
> >> >+
> >> >+MSR_KVM_ASYNC_PF_EN: 0x4b564d02
> >> >+ data: Bits 63-6 hold 64-byte aligned physical address of a
> >> 32bit memory
> >>
> >> Given that it must be aligned anyway, we can require it to be a
> >> 64-byte region and also require that the guest zero it before
> >> writing the MSR. That will give us a little more flexibility in the
> >> future.
> >>
> >No code change needed, so OK.
>
> The guest needs to allocate a 64-byte per-cpu entry instead of a
> 4-byte entry.
>
Yes, noticed that already :(
>
> >> >+
> >> >+ kvm_async_pf_wakeup_all(vcpu);
> >>
> >> Why is this needed? If all apfs are flushed at disable time, what
> >> do we need to wake up?
> >For migration. Destination will rewrite msr and all processes will be
> >waked up.
>
> Ok. What happens to apf completions that happen after all vcpus are stopped?
>
They will be cleaned by kvm_clear_async_pf_completion_queue() on vcpu
destroy.
--
Gleb.
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