This patch cleans up the table-based setup for legacy devices to use ioport__register().
Cc: Asias He <[email protected]> Cc: Cyrill Gorcunov <[email protected]> Cc: Ingo Molnar <[email protected]> Signed-off-by: Pekka Enberg <[email protected]> --- tools/kvm/include/kvm/ioport.h | 2 + tools/kvm/ioport.c | 128 ++++++++++++++++------------------------ tools/kvm/kvm-run.c | 3 + 3 files changed, 57 insertions(+), 76 deletions(-) diff --git a/tools/kvm/include/kvm/ioport.h b/tools/kvm/include/kvm/ioport.h index b77f565..0218329 100644 --- a/tools/kvm/include/kvm/ioport.h +++ b/tools/kvm/include/kvm/ioport.h @@ -18,6 +18,8 @@ struct ioport_operations { bool (*io_out)(struct kvm *self, uint16_t port, void *data, int size, uint32_t count); }; +void ioport__setup_legacy(void); + void ioport__register(uint16_t port, struct ioport_operations *ops, int count); static inline uint8_t ioport__read8(uint8_t *data) diff --git a/tools/kvm/ioport.c b/tools/kvm/ioport.c index 6303571..e3f67fc 100644 --- a/tools/kvm/ioport.c +++ b/tools/kvm/ioport.c @@ -62,82 +62,7 @@ static struct ioport_operations dummy_write_only_ioport_ops = { .io_out = dummy_io_out, }; -static struct ioport_operations *ioport_ops[USHRT_MAX] = { - /* 0x0020 - 0x003F - 8259A PIC 1 */ - [0x0020] = &dummy_read_write_ioport_ops, - [0x0021] = &dummy_read_write_ioport_ops, - - /* PORT 0040-005F - PIT - PROGRAMMABLE INTERVAL TIMER (8253, 8254) */ - [0x0040] = &dummy_read_write_ioport_ops, /* Ch 0 */ - [0x0041] = &dummy_read_write_ioport_ops, /* Ch 1 */ - [0x0042] = &dummy_read_write_ioport_ops, /* Ch 2 */ - [0x0043] = &dummy_read_write_ioport_ops, /* Mod/Cmd */ - - /* PORT 0060-006F - KEYBOARD CONTROLLER 804x (8041, 8042) (or PPI (8255) on PC,XT) */ - [0x0060] = &dummy_read_write_ioport_ops, - [0x0061] = &dummy_read_write_ioport_ops, - [0x0064] = &dummy_read_write_ioport_ops, - - /* PORT 0070-007F - CMOS RAM/RTC (REAL TIME CLOCK) */ - [0x0070] = &cmos_ram_rtc_ops, - [0x0071] = &dummy_read_write_ioport_ops, - - /* 0x00A0 - 0x00AF - 8259A PIC 2 */ - [0x00A0] = &dummy_read_write_ioport_ops, - [0x00A1] = &dummy_read_write_ioport_ops, - - /* PORT 00E0-00EF are 'motherboard specific' so we use them for our - internal debugging purposes. */ - [IOPORT_DBG] = &debug_ops, - - /* PORT 00ED - DUMMY PORT FOR DELAY??? */ - [0x00ED] = &dummy_write_only_ioport_ops, - - /* 0x00F0 - 0x00FF - Math co-processor */ - [0x00F0] = &dummy_write_only_ioport_ops, - [0x00F1] = &dummy_write_only_ioport_ops, - - /* PORT 02E8-02EF - serial port, same as 02F8, 03E8 and 03F8 (COM4) */ - [0x02E8] = &dummy_read_write_ioport_ops, - [0x02E9] = &dummy_read_write_ioport_ops, - [0x02EA] = &dummy_read_write_ioport_ops, - [0x02EB] = &dummy_read_write_ioport_ops, - [0x02EC] = &dummy_read_write_ioport_ops, - [0x02EE] = &dummy_read_write_ioport_ops, - [0x02EF] = &dummy_read_write_ioport_ops, - - /* PORT 02F8-02FF - serial port, same as 02E8, 03E8 and 03F8 (COM2) */ - [0x02F8] = &dummy_read_write_ioport_ops, - [0x02F9] = &dummy_read_write_ioport_ops, - [0x02FA] = &dummy_read_write_ioport_ops, - [0x02FB] = &dummy_read_write_ioport_ops, - [0x02FC] = &dummy_read_write_ioport_ops, - [0x02FF] = &dummy_read_write_ioport_ops, - - /* PORT 03D4-03D5 - COLOR VIDEO - CRT CONTROL REGISTERS */ - [0x03D4] = &dummy_read_write_ioport_ops, - [0x03D5] = &dummy_write_only_ioport_ops, - - /* PORT 03E8-03EF - serial port, same as 02E8, 02F8 and 03F8 (COM3) */ - [0x03E8] = &dummy_read_write_ioport_ops, - [0x03E9] = &dummy_read_write_ioport_ops, - [0x03EA] = &dummy_read_write_ioport_ops, - [0x03EB] = &dummy_read_write_ioport_ops, - [0x03EC] = &dummy_read_write_ioport_ops, - [0x03EF] = &dummy_read_write_ioport_ops, - - /* PORT 03F8-03FF - Serial port (8250,8250A,8251,16450,16550,16550A,etc.) COM1 */ - [0x03F9] = &dummy_read_write_ioport_ops, - [0x03FA] = &dummy_read_write_ioport_ops, - [0x03FB] = &dummy_read_write_ioport_ops, - [0x03FC] = &dummy_read_write_ioport_ops, - [0x03FF] = &dummy_read_write_ioport_ops, - - /* PORT 0CF8-0CFF - PCI Configuration Mechanism 1 - Configuration Registers */ - [0x0CF8] = &dummy_write_only_ioport_ops, - [0x0CFC] = &dummy_read_write_ioport_ops, - [0x0CFE] = &dummy_read_write_ioport_ops, -}; +static struct ioport_operations *ioport_ops[USHRT_MAX]; void ioport__register(uint16_t port, struct ioport_operations *ops, int count) { @@ -190,3 +115,54 @@ error: return !ioport_debug; } + +void ioport__setup_legacy(void) +{ + /* 0x0020 - 0x003F - 8259A PIC 1 */ + ioport__register(0x0020, &dummy_read_write_ioport_ops, 2); + + /* PORT 0040-005F - PIT - PROGRAMMABLE INTERVAL TIMER (8253, 8254) */ + ioport__register(0x0040, &dummy_read_write_ioport_ops, 4); + + /* PORT 0060-006F - KEYBOARD CONTROLLER 804x (8041, 8042) (or PPI (8255) on PC,XT) */ + ioport__register(0x0060, &dummy_read_write_ioport_ops, 2); + ioport__register(0x0064, &dummy_read_write_ioport_ops, 1); + + /* PORT 0070-007F - CMOS RAM/RTC (REAL TIME CLOCK) */ + ioport__register(0x0070, &cmos_ram_rtc_ops, 1); + ioport__register(0x0071, &dummy_read_write_ioport_ops, 1); + + /* 0x00A0 - 0x00AF - 8259A PIC 2 */ + ioport__register(0x00A0, &dummy_read_write_ioport_ops, 2); + + /* PORT 00E0-00EF are 'motherboard specific' so we use them for our + internal debugging purposes. */ + ioport__register(IOPORT_DBG, &debug_ops, 1); + + /* PORT 00ED - DUMMY PORT FOR DELAY??? */ + ioport__register(0x00ED, &dummy_write_only_ioport_ops, 1); + + /* 0x00F0 - 0x00FF - Math co-processor */ + ioport__register(0x00F0, &dummy_write_only_ioport_ops, 2); + + /* PORT 02E8-02EF - serial port, same as 02F8, 03E8 and 03F8 (COM4) */ + ioport__register(0x02E8, &dummy_read_write_ioport_ops, 7); + + /* PORT 02F8-02FF - serial port, same as 02E8, 03E8 and 03F8 (COM2) */ + ioport__register(0x02F8, &dummy_read_write_ioport_ops, 7); + + /* PORT 03D4-03D5 - COLOR VIDEO - CRT CONTROL REGISTERS */ + ioport__register(0x03D4, &dummy_read_write_ioport_ops, 1); + ioport__register(0x03D5, &dummy_write_only_ioport_ops, 1); + + /* PORT 03E8-03EF - serial port, same as 02E8, 02F8 and 03F8 (COM3) */ + ioport__register(0x03E8, &dummy_read_write_ioport_ops, 7); + + /* PORT 03F8-03FF - Serial port (8250,8250A,8251,16450,16550,16550A,etc.) COM1 */ + ioport__register(0x03F8, &dummy_read_write_ioport_ops, 7); + + /* PORT 0CF8-0CFF - PCI Configuration Mechanism 1 - Configuration Registers */ + ioport__register(0x0CF8, &dummy_write_only_ioport_ops, 1); + ioport__register(0x0CFC, &dummy_read_write_ioport_ops, 1); + ioport__register(0x0CFE, &dummy_read_write_ioport_ops, 1); +} diff --git a/tools/kvm/kvm-run.c b/tools/kvm/kvm-run.c index d978ee5..1944307 100644 --- a/tools/kvm/kvm-run.c +++ b/tools/kvm/kvm-run.c @@ -18,6 +18,7 @@ #include <kvm/util.h> #include <kvm/pci.h> #include <kvm/term.h> +#include <kvm/ioport.h> /* header files for gitish interface */ #include <kvm/kvm-run.h> @@ -196,6 +197,8 @@ int kvm_cmd_run(int argc, const char **argv, const char *prefix) real_cmdline)) die("unable to load kernel %s", kernel_filename); + ioport__setup_legacy(); + kvm__setup_bios(kvm); serial8250__init(kvm); -- 1.7.0.4 -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
