On Tue, 2011-06-28 at 18:10 +0200, Joerg Roedel wrote: > On Fri, Jun 17, 2011 at 03:37:29PM +0200, Joerg Roedel wrote: > > this is the second version of the patch-set to support the AMD > > guest-/host only bits in the performance counter MSRs. Due to lack of > > time I havn't looked into emulating support for this feature on Intel or > > other architectures, but the other comments should be worked in. The > > changes to v1 include: > > > > * Rebased patches to v3.0-rc3 > > * Allow exclude_guest and exclude_host set at the same time > > * Reworked event-parse logic for the new exclude-bits > > * Only count guest-events per default from perf-kvm > > Hi Peter, Ingo, > > have you had a chance to look at this patch-set? Are any changes > required?
I would feel a lot more comfortable by having it implemented on all of x86 as well as at least one !x86 platform. Avi graciously volunteered for the Intel bits. Paulus, I hear from benh that you're also responsible for the ppc-kvm bits, could you possibly find some time to implement this feature for ppc? -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
