Il 09/09/2013 17:29, Arthur Chunqi Li ha scritto:
> Hi Paolo,
> I noticed another possible bug of this patch. Stage 4 of this patch
> test the scenario that the page of a paging structure is not present,
> then this will cause EPT violation vmexit with bit 8 of exit_qual
> unset. My question is: will instruction length be correctly set on
> this scenario? I got wrong insn_len in "case 4" of VMX_EPT_VIOLATION,
> which may cause triple fault vmexit.

It's plausible that the instruction length is wrong, since the processor
might be fetching the instruction itself and doesn't know the length.

Paolo
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