For GICv2, there are at most 5 priority bits are implemented in GICH_LR<n>.Priority, so we only need to be concerned with GICH_APR0. The other GICH_APRn access can be treated as raz/wi.
Attention: This patch is untest! Signed-off-by: wanghaibin <[email protected]> --- virt/kvm/arm/vgic/vgic-v2.c | 21 +++++++++++++++++++++ virt/kvm/arm/vgic/vgic.h | 2 ++ 2 files changed, 23 insertions(+) diff --git a/virt/kvm/arm/vgic/vgic-v2.c b/virt/kvm/arm/vgic/vgic-v2.c index e4187e5..11d3b73 100644 --- a/virt/kvm/arm/vgic/vgic-v2.c +++ b/virt/kvm/arm/vgic/vgic-v2.c @@ -172,6 +172,27 @@ void vgic_v2_clear_lr(struct kvm_vcpu *vcpu, int lr) vcpu->arch.vgic_cpu.vgic_v2.vgic_lr[lr] = 0; } +void vgic_v2_set_apr(struct kvm_vcpu *vcpu, u32 idx, u32 val) +{ + struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2; + + if (idx == 0) + cpu_if->vgic_apr = val; + else + WARN_ON(val); +} + +u32 vgic_v2_get_apr(struct kvm_vcpu *vcpu, u32 idx) +{ + struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2; + + if (idx == 0) + return cpu_if->vgic_apr; + else + return 0; +} + + void vgic_v2_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcrp) { struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2; diff --git a/virt/kvm/arm/vgic/vgic.h b/virt/kvm/arm/vgic/vgic.h index bba7fa2..8791b9a 100644 --- a/virt/kvm/arm/vgic/vgic.h +++ b/virt/kvm/arm/vgic/vgic.h @@ -155,6 +155,8 @@ int vgic_v2_dist_uaccess(struct kvm_vcpu *vcpu, bool is_write, int offset, u32 *val); int vgic_v2_cpuif_uaccess(struct kvm_vcpu *vcpu, bool is_write, int offset, u32 *val); +void vgic_v2_set_apr(struct kvm_vcpu *vcpu, u32 idx, u32 val); +u32 vgic_v2_get_apr(struct kvm_vcpu *vcpu, u32 idx); void vgic_v2_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr); void vgic_v2_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr); void vgic_v2_enable(struct kvm_vcpu *vcpu); -- 1.8.3.1 _______________________________________________ kvmarm mailing list [email protected] https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
