On Thu, Mar 01, 2018 at 03:55:26PM +0000, Marc Zyngier wrote: > Add an encoder for the EXTR instruction, which also implements the ROR > variant (where Rn == Rm). > > Reviewed-by: Christoffer Dall <christoffer.d...@linaro.org> > Signed-off-by: Marc Zyngier <marc.zyng...@arm.com>
Acked-by: Catalin Marinas <catalin.mari...@arm.com> _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
