On Fri, Jun 21, 2019 at 10:37:49AM +0100, Marc Zyngier wrote:
> From: Christoffer Dall <christoffer.d...@arm.com>
>
> Reset the VCPU with PSTATE.M = EL2h when the nested virtualization
> feature is enabled on the VCPU.
>
> Signed-off-by: Christoffer Dall <christoffer.d...@arm.com>
> Signed-off-by: Marc Zyngier <marc.zyng...@arm.com>
> ---
> arch/arm64/kvm/reset.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm64/kvm/reset.c b/arch/arm64/kvm/reset.c
> index 1140b4485575..675ca07dbb05 100644
> --- a/arch/arm64/kvm/reset.c
> +++ b/arch/arm64/kvm/reset.c
> @@ -52,6 +52,11 @@ static const struct kvm_regs default_regs_reset = {
> PSR_F_BIT | PSR_D_BIT),
> };
>
> +static const struct kvm_regs default_regs_reset_el2 = {
> + .regs.pstate = (PSR_MODE_EL2h | PSR_A_BIT | PSR_I_BIT |
> + PSR_F_BIT | PSR_D_BIT),
> +};
> +
Is it worth having a #define for the common non-mode bits? It's a bit
weird for EL2 and EL1 to have indepedent DAIF defaults.
Putting a big block of zeros in the kernel text just to initialise one
register seems overkill. Now we're adding a third block of zeros,
maybe this is worth refactoring? We really just need a memset(0)
followed by config-dependent initialisation of regs.pstate AFAICT.
Not a big deal though: this doesn't look like a high risk for
maintainability.
Cheers
---Dave
> static const struct kvm_regs default_regs_reset32 = {
> .regs.pstate = (PSR_AA32_MODE_SVC | PSR_AA32_A_BIT |
> PSR_AA32_I_BIT | PSR_AA32_F_BIT),
> @@ -302,6 +307,8 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
> if (!cpu_has_32bit_el1())
> goto out;
> cpu_reset = &default_regs_reset32;
> + } else if (test_bit(KVM_ARM_VCPU_NESTED_VIRT,
> vcpu->arch.features)) {
> + cpu_reset = &default_regs_reset_el2;
> } else {
> cpu_reset = &default_regs_reset;
> }
> --
> 2.20.1
>
>
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