Hi Andrew,
On Wed, Apr 22, 2020 at 05:13:46PM +0100, Andrew Scull wrote:
> Errata 1165522, 1319367 and 1530923 each allow TLB entries to be
> allocated as a result of a speculative AT instruction. In order to
> avoid mandating VHE on certain affected CPUs, apply the workaround to
> both the nVHE and the VHE case for all affected CPUs.
>
> Signed-off-by: Andrew Scull <[email protected]>
> CC: Marc Zyngier <[email protected]>
> CC: James Morse <[email protected]>
> CC: Suzuki K Poulose <[email protected]>
> CC: Will Deacon <[email protected]>
> CC: Steven Price <[email protected]>
> ---
> * From v1 <[email protected]>:
> - Restored registers in VHE path
This largely looks good to me, but I don't understand these bits:
> diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c
> index 8a1e81a400e0..651820f537fb 100644
> --- a/arch/arm64/kvm/hyp/switch.c
> +++ b/arch/arm64/kvm/hyp/switch.c
> @@ -138,7 +138,7 @@ static void __hyp_text __activate_traps_nvhe(struct
> kvm_vcpu *vcpu)
>
> write_sysreg(val, cptr_el2);
>
> - if (cpus_have_final_cap(ARM64_WORKAROUND_SPECULATIVE_AT_NVHE)) {
> + if (cpus_have_const_cap(ARM64_WORKAROUND_SPECULATIVE_AT)) {
It seems like you consistently replace cpus_have_final_cap() with
cpus_have_const_cap(), but I can't figure out why that's required.
Cheers,
Will
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