Hi Marc, On 22/04/2020 13:00, Marc Zyngier wrote: > As ELR-EL1 is a VNCR-capable register with ARMv8.4-NV, let's move it to > the sys_regs array and repaint the accessors. While we're at it, let's > kill the now useless accessors used only on the fault injection path.
Reviewed-by: James Morse <[email protected]> A curiosity: > diff --git a/arch/arm64/include/asm/kvm_host.h > b/arch/arm64/include/asm/kvm_host.h > index 95977b80265ce..46949fce3e813 100644 > --- a/arch/arm64/include/asm/kvm_host.h > +++ b/arch/arm64/include/asm/kvm_host.h > @@ -184,6 +184,8 @@ enum vcpu_sysreg { Comment above the enum has some claims about the order, but its already out of order with __vcpu_read_sys_reg_from_cpu()... (PAR_EL1 being the culprit) (I think it only matters for searching by encoding, which is checked at boot.) > APGAKEYLO_EL1, > APGAKEYHI_EL1, > > + ELR_EL1, > + > /* 32bit specific registers. Keep them at the end of the range */ > DACR32_EL2, /* Domain Access Control Register */ > IFSR32_EL2, /* Instruction Fault Status Register */ > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > index 5bda4af36a0e7..7c2fffb20c217 100644 > --- a/arch/arm64/kvm/sys_regs.c > +++ b/arch/arm64/kvm/sys_regs.c > @@ -95,6 +95,7 @@ static bool __vcpu_read_sys_reg_from_cpu(int reg, u64 *val) > case TPIDR_EL1: *val = read_sysreg_s(SYS_TPIDR_EL1); break; > case AMAIR_EL1: *val = read_sysreg_s(SYS_AMAIR_EL12); break; > case CNTKCTL_EL1: *val = read_sysreg_s(SYS_CNTKCTL_EL12); break; > + case ELR_EL1: *val = read_sysreg_s(SYS_ELR_EL12); break; > case PAR_EL1: *val = read_sysreg_s(SYS_PAR_EL1); break; > case DACR32_EL2: *val = read_sysreg_s(SYS_DACR32_EL2); break; > case IFSR32_EL2: *val = read_sysreg_s(SYS_IFSR32_EL2); break; Thanks, James _______________________________________________ kvmarm mailing list [email protected] https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
