The CPUs in the Apple M1 SoC partially implement a virtual GICv3 CPU interface, although one that is incapable of HW deactivation of interrupts.
Advertise the support to KVM. Signed-off-by: Marc Zyngier <[email protected]> --- drivers/irqchip/irq-apple-aic.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/irqchip/irq-apple-aic.c b/drivers/irqchip/irq-apple-aic.c index 26ee149dbae3..ac24d9fcc044 100644 --- a/drivers/irqchip/irq-apple-aic.c +++ b/drivers/irqchip/irq-apple-aic.c @@ -51,6 +51,7 @@ #include <linux/cpuhotplug.h> #include <linux/io.h> #include <linux/irqchip.h> +#include <linux/irqchip/arm-vgic-info.h> #include <linux/irqdomain.h> #include <linux/of_address.h> #include <linux/slab.h> @@ -655,6 +656,11 @@ static int aic_init_cpu(unsigned int cpu) } +static struct gic_kvm_info vgic_info __initdata = { + .type = GIC_V3, + .no_hw_deactivation = true, +}; + static int __init aic_of_ic_init(struct device_node *node, struct device_node *parent) { int i; @@ -708,6 +714,7 @@ static int __init aic_of_ic_init(struct device_node *node, struct device_node *p "irqchip/apple-aic/ipi:starting", aic_init_cpu, NULL); + vgic_set_kvm_info(&vgic_info); pr_info("AIC: initialized with %d IRQs, %d FIQs, %d vIPIs\n", irqc->nr_hw, AIC_NR_FIQ, AIC_NR_SWIPI); -- 2.29.2 _______________________________________________ kvmarm mailing list [email protected] https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
