On Fri, Apr 23, 2021 at 09:58:24AM +0100, Marc Zyngier wrote:
> Hi Ricardo,
>
> Thanks for starting this.
>
> On Fri, 23 Apr 2021 05:03:49 +0100,
> Ricardo Koller <[email protected]> wrote:
> > +.pushsection ".entry.text", "ax"
> > +.balign 0x800
> > +.global vectors
> > +vectors:
> > +.popsection
> > +
> > +/*
> > + * Build an exception handler for vector and append a jump to it into
> > + * vectors (while making sure that it's 0x80 aligned).
> > + */
> > +.macro HANDLER, el, label, vector
> > +handler\()\vector:
> > + save_registers \el
> > + mov x0, sp
> > + mov x1, \vector
> > + bl route_exception
> > + restore_registers \el
> > +
> > +.pushsection ".entry.text", "ax"
> > +.balign 0x80
> > + b handler\()\vector
> > +.popsection
> > +.endm
>
> That's an interesting construct, wildly different from what we are
> using elsewhere in the kernel, but hey, I like change ;-). It'd be
> good to add a comment to spell out that anything that emits into
> .entry.text between the declaration of 'vectors' and the end of this
> file will break everything.
>
> > +
> > +.global ex_handler_code
> > +ex_handler_code:
> > + HANDLER 1, sync, 0 // Synchronous EL1t
> > + HANDLER 1, irq, 1 // IRQ EL1t
> > + HANDLER 1, fiq, 2 // FIQ EL1t
> > + HANDLER 1, error, 3 // Error EL1t
>
> Can any of these actually happen? As far as I can see, the whole
> selftest environment seems to be designed around EL1h.
>
They can happen. KVM defaults to use EL1h:
#define VCPU_RESET_PSTATE_EL1 (PSR_MODE_EL1h | PSR_A_BIT | PSR_I_BIT
| \
but then a guest can set the SPSel to 0:
asm volatile("msr spsel, #0");
and this happens:
Unexpected exception guest (vector:0x0, ec:0x25)
I think it should still be a valid situation: some test might want to
try it.
Thanks,
Ricardo
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