On Wed, 24 Nov 2021 17:07:07 +0000,
Tyler Baicar <[email protected]> wrote:
>
> Add support for parsing the ARM Error Source Table and basic handling of
> errors reported through both memory mapped and system register interfaces.
>
> Assume system register interfaces are only registered with private
> peripheral interrupts (PPIs); otherwise there is no guarantee the
> core handling the error is the core which took the error and has the
> syndrome info in its system registers.
>
> Add logging for all detected errors and trigger a kernel panic if there is
> any uncorrected error present.
>
> Signed-off-by: Tyler Baicar <[email protected]>
> ---
> MAINTAINERS | 1 +
> arch/arm64/include/asm/ras.h | 52 ++++
> arch/arm64/include/asm/sysreg.h | 2 +
> arch/arm64/kernel/Makefile | 1 +
> arch/arm64/kernel/ras.c | 125 +++++++++
> arch/arm64/kvm/sys_regs.c | 2 +
> drivers/acpi/arm64/Kconfig | 3 +
> drivers/acpi/arm64/Makefile | 1 +
> drivers/acpi/arm64/aest.c | 450 ++++++++++++++++++++++++++++++++
> include/linux/acpi_aest.h | 50 ++++
> include/linux/cpuhotplug.h | 1 +
> 11 files changed, 688 insertions(+)
> create mode 100644 arch/arm64/include/asm/ras.h
> create mode 100644 arch/arm64/kernel/ras.c
> create mode 100644 drivers/acpi/arm64/aest.c
> create mode 100644 include/linux/acpi_aest.h
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 5250298d2817..aa0483726606 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -382,6 +382,7 @@ ACPI FOR ARM64 (ACPI/arm64)
> M: Lorenzo Pieralisi <[email protected]>
> M: Hanjun Guo <[email protected]>
> M: Sudeep Holla <[email protected]>
> +R: Tyler Baicar <[email protected]>
> L: [email protected]
> L: [email protected] (moderated for non-subscribers)
> S: Maintained
Isn't this a bit premature? This isn't even mentioned in the commit
message, only in passing in the cover letter.
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 16b3f1a1d468..6bbed061d835 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -230,6 +230,8 @@
> #define SYS_ERXADDR_EL1 sys_reg(3, 0, 5, 4, 3)
> #define SYS_ERXMISC0_EL1 sys_reg(3, 0, 5, 5, 0)
> #define SYS_ERXMISC1_EL1 sys_reg(3, 0, 5, 5, 1)
> +#define SYS_ERXMISC2_EL1 sys_reg(3, 0, 5, 5, 2)
> +#define SYS_ERXMISC3_EL1 sys_reg(3, 0, 5, 5, 3)
> #define SYS_TFSR_EL1 sys_reg(3, 0, 5, 6, 0)
> #define SYS_TFSRE0_EL1 sys_reg(3, 0, 5, 6, 1)
>
> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> index e3ec1a44f94d..dc15e9896db4 100644
> --- a/arch/arm64/kvm/sys_regs.c
> +++ b/arch/arm64/kvm/sys_regs.c
> @@ -1573,6 +1573,8 @@ static const struct sys_reg_desc sys_reg_descs[] = {
> { SYS_DESC(SYS_ERXADDR_EL1), trap_raz_wi },
> { SYS_DESC(SYS_ERXMISC0_EL1), trap_raz_wi },
> { SYS_DESC(SYS_ERXMISC1_EL1), trap_raz_wi },
> + { SYS_DESC(SYS_ERXMISC2_EL1), trap_raz_wi },
> + { SYS_DESC(SYS_ERXMISC3_EL1), trap_raz_wi },
>
This looks like a fix that would deserve its own patch.
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
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