On Tue, 25 Jan 2022 12:52:18 +0000,
Mark Brown <[email protected]> wrote:
> 
> [1  <text/plain; us-ascii (7bit)>]
> On Tue, Jan 25, 2022 at 11:59:02AM +0000, Marc Zyngier wrote:
> > Mark Brown <[email protected]> wrote:
> 
> > > + if (has_vhe()) {
> > > +         if (system_supports_sme()) {
> 
> > nit:        if (has_vhe() && system_supports_sme()) {
> 
> > saves you one level of indentation.
> 
> Yes, for now.  IIRC there was some other stuff there when I had some of
> the code for doing the register switching properly.
> 
> > > +                 /* Also restore EL0 state seen on entry */
> > > +                 if (vcpu->arch.flags & KVM_ARM64_HOST_SME_ENABLED)
> > > +                         sysreg_clear_set(CPACR_EL1, 0,
> > > +                                          CPACR_EL1_SMEN_EL0EN |
> > > +                                          CPACR_EL1_SMEN_EL1EN);
> > > +                 else
> > > +                         sysreg_clear_set(CPACR_EL1,
> > > +                                          CPACR_EL1_SMEN_EL0EN,
> > > +                                          CPACR_EL1_SMEN_EL1EN);
> 
> > I find the use of CPACR_EL1_SMEN in some cases and its individual bits
> > in some others pretty confusing. I understand that you have modelled
> > it after the SVE code, but maybe this is a mistake we don't need to
> > repeat. I'd be in favour of directly exposing the individual bits in
> > all cases.
> 
> OK, it is just the KVM code that uses the plain ZEN.  I'll add a cleanup
> patch for that at the start of the series for ZEN I guess otherwise it
> looks worse, though that will inflate the size of the series a bit.

I'm happy to merge such a patch early if that helps.

        M.

-- 
Without deviation from the norm, progress is not possible.
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